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  may 1999 bss84 / BSS110 p -channel enhancement mode field effect transistor general description features ____________ ________________________________________________________________________________ absolute maximum ratings t a = 25c unless otherwise noted symbol parameter bss84 BSS110 units v dss drain-source voltage -50 v v dgr drain-gate voltage (r gs < 20 k w ) -50 v v gss gate-source voltage - continuous 20 v i d drain current - continuous @ t a = 30/35 o c -0.13 -0.17 a - pulsed @ t a = 2 5 o c -0.52 -0.68 p d maximum power dissipation t a = 25 c 0.36 0.63 w t j ,t stg operating and storage temperature range -55 to 15 0 c t l maximum lead temperature for soldering purposes, 1/16" from case for 10 seconds 300 c thermal characteristics r q ja thermal resistance, junction-to-ambient 350 200 c/w bss84 rev. c1 / BSS110. rev. a2 these p-c hannel enhancement mode power field effect transistors are produced using fairchild's proprietary, high cell density, dmos technology. this very high density process is designed to minimize on-state resistance, provide rugged and reliable performance and fast switching. they can be used, with a minimum of effort, in most applications requiring up to 0.17a dc and can deliver pulsed currents up to 0.68a. this product is particularly suited to low voltage applications requiring a low current high side switch. bss84: -0.13a, -50v. r ds(on ) = 10 w @ v gs = -5v. BSS110: -0.17a, -50v. r ds(on ) = 10 w @ v gs = -10v voltage controlled p-channel small signal switch. high density cell design for low r ds(on) . high saturation current . s d g ? 1997 fairchild semiconductor corporation
electrical characteristics (t a = 25c unless otherwise noted) symbol parameter conditions typ e min typ max units off characteristics bv dss drain-source breakdown voltage v gs = 0 v, i d = -250 a all -50 v i dss zero gate voltage drain current v ds = -50 v , v gs = 0 v all -15 a t j = 125c -60 a v ds = -25 v , v gs = 0 v -0.1 a i gssr gate - body leakage, reverse v gs = -20 v, v ds = 0 v all -10 na on characteristics (note 1) v gs (th) gate threshold voltage v ds = v gs , i d = -1 ma all -0.8 -1.75 -2 v r ds(on) static drain-source on-resistance v gs = -5v, i d = -0.10 a bss84 3.2 10 w v gs = -10 v, i d = -0.17 a BSS110 2.2 10 g fs forward transconductance v ds = -25 v, i d = -0.10 a bss84 0.05 0.27 s v ds = -10 v, i d = -0.17 a BSS110 0.05 0.29 dynamic characteristics c iss input capacitance v ds = -25 v, v gs = 0 v, f = 1.0 mhz bss84 37 45 pf BSS110 37 40 c oss output capacitance all 16 25 pf c rss reverse transfer capacitance all 5 12 pf switching ch aracteristics (note 1) t d(on) turn - on delay time v dd = -30 v, i d = -0.27 a , v gs = -10 v, r gen = 50 w all 12 ns t r turn - on rise time all 50 ns t d(off) turn - off delay time all 10 ns t f turn - off fall time all 25 ns drain-source diode characteristics i s continuous source diode current bss84 -0.13 a BSS110 -0.17 i sm maximum pulsed source diode current (note 1) bss84 -0.52 a BSS110 -0.68 v sd drain-source diode forward voltage v gs = 0 v, i s = -0.26 a (note 1) bss84 -0.95 -1.2 v v gs = 0 v, i s = -0.34 a (note 1) BSS110 -1 -1.2 note: 1. pulse test: pulse width < 300 m s, duty cycle < 2.0%. bss84 rev. c1 / BSS110. rev. a2
bss84 rev. c1 / BSS110. rev. a2 -6 -5 -4 -3 -2 -1 0 -1 -0.8 -0.6 -0.4 -0.2 v , drain-source voltage (v) i , drain-source current (a) v = -10v gs ds d -8.0 -4.0 -6.0 -5.0 -4.5 -3.5 -2.5 -3.0 -1 -0.8 -0.6 -0.4 -0.2 0.5 1 1.5 2 2.5 3 i , drain current (a) drain-source on-resistance v = -3v gs d r , normalized ds(on) -3.5 -4.5 -5.0 -6.0 -10 -4.0 -8.0 figure 1. on-region characteristics figure 2. on-resistance variation with drain current and gate voltage typical electrical characteristics -50 -25 0 25 50 75 100 125 150 0.6 0.8 1 1.2 1.4 1.6 t , junction temperature (c) drain-source on-resistance j r , normalized ds(on) i = -0.13a v = -10v d gs -1 -0.8 -0.6 -0.4 -0.2 0.5 1 1.5 2 2.5 3 i , drain current (a) drain-source on-resistance t = 125c j d r , normalized ds(on) 25c -55c v = -10v gs figure 3. on-resistance variation with temperature figure 4. on-resistance variation with drain current and temperature -8 -6 -4 -2 0 -1 -0.8 -0.6 -0.4 -0.2 v , gate to source voltage (v) i , drain current (a) 25c 125c v = -10v ds gs d t = -55c j -50 -25 0 25 50 75 100 125 150 0.85 0.9 0.95 1 1.05 1.1 t , junction temperature (c) gate-source threshold voltage j v = v i = -1ma d ds gs v , normalized th figure 5. transfer characteristics figure 6. gate threshold variation with temperature
bss84 rev. c1 / BSS110. rev. a2 -50 -25 0 25 50 75 100 125 150 0.9 0.95 1 1.05 1.1 t , junction temperature (c) drain-source breakdown voltage i = -250a d bv , normalized dss j 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 0.001 0.005 0.01 0.05 0.1 0.2 0.5 1 -v , body diode forward voltage (v) -i , reverse drain current (a) v = 0v gs t = 125c j 25c -55c sd s figure 7. breakdown voltage variation with temperature figure 8. body diode forward voltage variation with source current and temperature typical electrical characteristics (continued) 0 0.5 1 1.5 2 0 2 4 6 8 10 q , gate charge (nc) -v , gate-source voltage (v) g gs v = -10v ds i = -0.13a d -20v -40v 0.1 0.2 0.5 1 2 5 10 20 30 50 2 3 5 10 20 30 50 70 -v , drain to source voltage (v) capacitance (pf) ds c iss f = 1 mhz v = 0v gs c oss c rss figure 9. capacitance characteristics figure 10. gate charge characteristics g d s v dd r l v v in out v gs dut r gen 10% 50% 90% 10% 90% 90% 50% v in v out on off d(off) f r d(on) t t t t t t inverted 10% pulse width figure 11. switching test circuit figure 12. switching waveforms
bss84 rev. c1 / BSS110. rev. a2 -1 -0.8 -0.6 -0.4 -0.2 0 0.1 0.2 0.3 0.4 0.5 i , drain current (a) g , transconductance (siemens) t = -55c j d fs v = -10v ds 125c 25c 1 2 5 10 20 30 50 80 0.005 0.01 0.05 0.1 0.5 1 2 - v , drain-source voltage (v) -i , drain current (a) ds d v = -10v single pulse t = 25c gs a rds(on) limit 100ms 1ms 10ms dc 1s 100us 10s figure 13. transconductance variation with drain current and temperature figure 14. maximum safe operating area typical electrical characteristics (continued) 0.0001 0.001 0.01 0.1 1 10 100 300 0.001 0.002 0.01 0.05 0.1 0.2 0.5 1 t , time (sec) t r a n s i e n t t h e r m a l r e s i s t a n c e r(t), normalized effective 1 single pulse d = 0.5 0.1 0.05 0.02 0.01 0.2 duty cycle, d = t /t 1 2 r (t) = r(t) * r r = 350 c/w q ja q ja q ja t - t = p * r (t) q ja a j p(pk) t 1 t 2 o figure 15. transient thermal response curve note : characterization performed using a circuit board with 175 o c/w typical case-to-ambient thermal resistance .
january 2000, rev. b to-92 package dimensions to-92; to-18 reverse lead form (j35z option) (fs pkg code 92, 94, 96) 1:1 scale 1:1 on letter size paper dimensions shown below are in: inches [millimeters] part weight per unit (gram): 0.22 note: all package 97 or 98 transistors are leadformed to this configuration prior to bulk shipment. order l34z option if in-line leads are preferred on package 97 or 98. * * ; * standard option on 97 & 98 package code
sot-23 packaging configuration: figure 1.0 components leader tape 500mm minimum or 125 empty pockets trailer tape 300mm minimum or 75 empt y poc kets sot-23 tape leader and trailer configuration: figure 2.0 cover tape carrier tape note/comments packaging option sot-23 packaging information standard (no fl ow code) d87z packaging type reel size tnr 7" di a tnr 13" qty per reel/tube/bag 3,000 10,000 box dimension (mm) 187x107x183 343x343x64 max qty per box 24,000 30,000 weight per unit (gm) 0.0082 0.0082 weight per reel (kg) 0.1175 0.4006 human readable label human readable label human readable label sample 343mm x 342mm x 64mm intermediate box for l87z option 187mm x 107mm x 183mm intermediate box for standard option sot-23 unit orientation 3p 3p 3p 3p human readable label customized la bel embossed carrier tape antistatic cover tape packaging description: sot-23 made from a dissi pati ve (carbon fi l led) poly carbonate resin. the cover tape is a multilayer film (heat activated adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. these reeled parts in standard option are shipped with 3,000 uni ts per 7" or 177cm diameter reel. the reels are dark blue in color and is made of polystyrene plastic (anti- static coated). other option comes in 10,000 units per 13" or 330cm diameter reel. thi s and some other opti ons are described in the packaging information table. these full reels are individually labeled and placed inside a s tandard intermediate made of recycl abl e corrugated brown pap er with a fai rchil d l ogo pri nti ng. one pizza box contains eight reels maximum. and these intermediate boxes are placed insi de a label ed shipping box whi ch comes i n different sizes depending on t he number of parts shi pped. parts are shipped in tape. the carrier tape is sot-23 tape and reel data and package dimensions september 1999, rev. c
dimensions are in millimeter pkg type a0 b0 w d0 d1 e1 e2 f p1 p0 k0 t wc tc sot-23 (8mm) 3.15 +/-0.10 2.77 +/-0.10 8.0 +/-0.3 1.55 +/-0.05 1.125 +/-0.125 1.75 +/-0.10 6.25 min 3.50 +/-0.05 4.0 +/-0.1 4.0 +/-0.1 1.30 +/-0.10 0.228 +/-0.013 5.2 +/-0.3 0.06 +/-0.02 dimensions are in inches and millimeters tape size reel option dim a dim b dim c dim d dim n dim w1 dim w2 dim w3 (lsl-usl) 8mm 7" dia 7.00 177.8 0.059 1.5 512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 2.165 55 0.331 +0.059/-0.000 8.4 +1.5/0 0.567 14.4 0.311 0.429 7.9 ?10.9 8mm 13" dia 13.00 330 0.059 1.5 512 +0.020/-0.008 13 +0.5/-0.2 0.795 20.2 4.00 100 0.331 +0.059/-0.000 8.4 +1.5/0 0.567 14.4 0.311 0.429 7.9 ?10.9 see detail aa dim a max 13" diameter option 7" diameter option dim a max see detail aa w3 w2 max measured at hub w1 measured at hub dim n dim d min dim c b min detail aa notes: a0, b0, and k0 dimensions are determined with respect to the eia/jedec rs-481 rotational and lateral movement requirements (see sketches a, b, and c). 20 deg maximum component rotation 0.5mm maximum 0.5mm maximum sketch c (top view) component lateral movement typical component cavity center line 20 deg maximum typical component center line b0 a0 sketch b (top view) component rotation sketch a (side or front sectional view) component rotation user direction of feed sot-23 embossed carrier tape configuration: figure 3.0 sot-23 reel configuration: figure 4.0 p1 a0 d1 f w e1 e2 tc wc k0 t b0 d0 p0 p2 sot-23 tape and reel data and package dimensions, continued september 1999, rev. c
sot-23 (fs pkg code 49) sot-23 tape and reel data and package dimensions, continued september 1998, rev. a1 1:1 scale 1:1 on letter size paper dimensions shown below are in: inches [millimeters] part weight per unit (gram): 0.0082
trademarks acex? coolfet? crossvolt? e 2 cmos tm fact? fact quiet series? fast ? fastr? gto? hisec? the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. syncfet? tinylogic? uhc? vcx? isoplanar? microwire? pop? powertrench qfet? qs? quiet series? supersot?-3 supersot?-6 supersot?-8 ? rev. d


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